Data Structures | |
struct | trx_param_t |
Files | |
file | transceiver.h |
Interface for Transceiver Access Functions. | |
Defines | |
#define | BPSK20 (0x52) |
#define | BPSK20_STR "BPSK20" |
#define | BPSK40 (0x92) |
#define | BPSK40_STR "BPSK40" |
#define | FCTL_ACK _BV(5) |
#define | FCTL_DATA _BV(0) |
#define | FCTL_DST_LONG 0x0c00 |
#define | FCTL_DST_MASK (FCTL_DST_LONG) |
#define | FCTL_DST_SHORT 0x0800 |
#define | FCTL_IPAN _BV(6) |
#define | FCTL_IPAN_MASK (FCTL_IPAN) |
#define | FCTL_SRC_LONG 0xc000 |
#define | FCTL_SRC_MASK (FCTL_SRC_LONG) |
#define | FCTL_SRC_SHORT 0x8000 |
#define | INVALID_PART_NUM (2) |
#define | INVALID_REV_NUM (1) |
#define | MAX_FRAME_SIZE (127) |
#define | OQPSK100 (0x90) |
#define | OQPSK1000 (0x34) |
#define | OQPSK1000_STR "OQPSK1000" |
#define | OQPSK100_STR "OQPSK100" |
#define | OQPSK200 (0x93) |
#define | OQPSK2000 (0x54) |
#define | OQPSK2000_STR "OQPSK2000" |
#define | OQPSK200_STR "OQPSK200" |
#define | OQPSK250 (0x33) |
#define | OQPSK250_STR "OQPSK250" |
#define | OQPSK400 (0x95) |
#define | OQPSK400_STR "OQPSK400" |
#define | OQPSK500 (0x94) |
#define | OQPSK500_STR "OQPSK500" |
#define | RATE_NONE (0xFF) |
#define | SPI_RATE_1_128 (3) |
#define | SPI_RATE_1_16 (1) |
#define | SPI_RATE_1_2 (4) |
#define | SPI_RATE_1_32 (6) |
#define | SPI_RATE_1_4 (0) |
#define | SPI_RATE_1_64 (2) |
#define | SPI_RATE_1_8 (5) |
#define | TRX_INIT_FAIL (1) |
#define | TRX_IRQ_AMI_DI() trx_bit_write(SR_MASK_AMI, 0); |
Disable AMI IRQ. | |
#define | TRX_IRQ_AMI_EI() trx_bit_write(SR_MASK_AMI, 1); |
Enable AMI IRQ. | |
#define | TRX_IRQ_BAT_LOW_DI() trx_bit_write(SR_MASK_BAT_LOW, 0); |
Disable BAT_LOW IRQ. | |
#define | TRX_IRQ_BAT_LOW_EI() trx_bit_write(SR_MASK_BAT_LOW, 1); |
Enable BAT_LOW IRQ. | |
#define | TRX_IRQ_CCA_ED_READY_DI() trx_bit_write(SR_MASK_CCA_ED_READY, 0); |
Disable CCA_ED_READY IRQ. | |
#define | TRX_IRQ_CCA_ED_READY_EI() trx_bit_write(SR_MASK_CCA_ED_READY, 1); |
Enable CCA_ED_READY IRQ. | |
#define | TRX_IRQ_PLL_UNLOCK_DI() trx_bit_write(SR_MASK_PLL_UNLOCK, 0); |
Disable PLL_UNLOCK IRQ. | |
#define | TRX_IRQ_PLL_UNLOCK_EI() trx_bit_write(SR_MASK_PLL_UNLOCK, 1); |
Enable PLL_UNLOCK IRQ. | |
#define | TRX_IRQ_RX_START_DI() trx_bit_write(SR_MASK_RX_START, 0); |
Disable RX_START IRQ. | |
#define | TRX_IRQ_RX_START_EI() trx_bit_write(SR_MASK_RX_START, 1); |
Enable RX_START IRQ. | |
#define | TRX_IRQ_TRX_IRQ_END_DI() trx_bit_write(SR_MASK_TRX_IRQ_END, 0); |
Disable TRX_IRQ_END IRQ. | |
#define | TRX_IRQ_TRX_IRQ_END_EI() trx_bit_write(SR_MASK_TRX_IRQ_END, 1); |
Enable TRX_IRQ_END IRQ. | |
#define | TRX_IRQ_TRX_IRQ_START_DI() trx_bit_write(SR_MASK_TRX_IRQ_START, 0); |
Disable TRX_IRQ_START IRQ. | |
#define | TRX_IRQ_TRX_IRQ_START_EI() trx_bit_write(SR_MASK_TRX_IRQ_START, 1); |
Enable TRX_IRQ_START IRQ. | |
#define | TRX_IRQ_UR_DI() trx_bit_write(SR_MASK_UR, 0); |
Disable TX/RX underun IRQ. | |
#define | TRX_IRQ_UR_EI() trx_bit_write(SR_MASK_UR, 1); |
Enable TX/RX underun IRQ. | |
#define | TRX_NEXT_CHANNEL(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MAX_CHANNEL : x+1) |
#define | TRX_NEXT_CHANNEL_WRAP(x) ((channel_t)(x+1) > TRX_MAX_CHANNEL ? TRX_MIN_CHANNEL : x+1 ) |
#define | TRX_OK (0) |
#define | TRX_PLL_FAIL (2) |
#define | TRX_PREV_CHANNEL(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MIN_CHANNEL : x-1) |
#define | TRX_PREV_CHANNEL_WRAP(x) ((channel_t)(x-1) < TRX_MIN_CHANNEL ? TRX_MAX_CHANNEL : x-1 ) |
Typedefs | |
typedef uint8_t | ccamode_t |
typedef int8_t | channel_t |
typedef bool | rxidle_t |
typedef void(* | trx_irq_handler_t )(uint8_t cause) |
typedef uint8_t | trx_ramaddr_t |
typedef uint8_t | trx_regaddr_t |
typedef uint8_t | trx_regval_t |
typedef int8_t | txpwr_t |
Enumerations | |
enum | trx_cfg_t { CFG_FLASH, CFG_EEPROM, CFG_NONE } |
Functions | |
trx_regval_t | trx_bit_read (trx_regaddr_t addr, trx_regval_t mask, uint8_t pos) |
subregister read | |
void | trx_bit_write (trx_regaddr_t addr, trx_regval_t mask, uint8_t pos, trx_regval_t value) |
subregister write | |
uint8_t | trx_decode_datarate (uint8_t rhash, char *rstr, uint8_t nlen) |
Decodes a hash value and returns a datarate string pointer. | |
void * | trx_decode_datarate_p (uint8_t rhash) |
Decodes a hash value and returns a datarate string pointer in program memory. | |
uint8_t | trx_frame_get_length (void) |
Get length of a received frame. | |
uint8_t | trx_frame_read (uint8_t *data, uint8_t datasz, uint8_t *lqi) |
Frame Read. | |
uint8_t | trx_frame_read_crc (uint8_t *data, uint8_t datasz, bool *crc_ok) |
Frame Read with CRC check (and crc value kept). | |
uint8_t | trx_frame_read_data_crc (uint8_t *data, uint8_t datasz, uint8_t *lqi, bool *crc_ok) |
Frame Read with CRC check (and crc value suppressed). | |
void | trx_frame_write (uint8_t length, uint8_t *data) |
Frame Write. | |
uint8_t | trx_get_datarate (void) |
get current adjusted data rate. | |
uint8_t | trx_get_datarate_str (uint8_t idx, char *rstr, uint8_t nlen) |
return a copy of a data rate in a buffer. | |
void * | trx_get_datarate_str_p (uint8_t idx) |
return a pointer to a datarate string in the programm memory. | |
uint8_t | trx_get_number_datarates (void) |
return the number of supported data rates. | |
void | trx_io_init (uint8_t spirate) |
SPI Initialization (RADIO_TYPE == AT86RF230). | |
void | trx_parms_get (trx_param_t *p) |
Get static transceiver parameters. | |
uint8_t | trx_parms_set (trx_param_t *p) |
Set static transceiver parameters. | |
uint8_t | trx_reg_read (trx_regaddr_t addr) |
Read Register. | |
void | trx_reg_write (trx_regaddr_t addr, trx_regval_t val) |
Write Register. | |
uint8_t | trx_set_datarate (uint8_t rate_type) |
set data rate | |
void | trx_set_irq_handler (trx_irq_handler_t irqhandler) |
void | trx_sram_read (trx_ramaddr_t addr, uint8_t length, uint8_t *data) |
Read SRAM. | |
void | trx_sram_write (trx_ramaddr_t addr, uint8_t length, uint8_t *data) |
Write SRAM. |
The Transceiver function interface is described in transceiver.h
This group of functions provides the basic host access to the transceiver chip.
Various examples on how to use this module can be found here.
#define FCTL_DATA _BV(0) |
#define FCTL_DST_LONG 0x0c00 |
#define FCTL_DST_SHORT 0x0800 |
#define FCTL_IPAN _BV(6) |
#define FCTL_SRC_LONG 0xc000 |
#define FCTL_SRC_SHORT 0x8000 |
#define INVALID_PART_NUM (2) |
flag for invalid part number
Definition at line 107 of file transceiver.h.
#define INVALID_REV_NUM (1) |
flag for invalid revision number
Definition at line 108 of file transceiver.h.
#define MAX_FRAME_SIZE (127) |
Maximum size in bytes of an IEEE 802.15.4 frame
Definition at line 134 of file transceiver.h.
#define SPI_RATE_1_128 (3) |
#define SPI_RATE_1_16 (1) |
#define SPI_RATE_1_2 (4) |
#define SPI_RATE_1_32 (6) |
#define SPI_RATE_1_4 (0) |
#define SPI_RATE_1_64 (2) |
#define SPI_RATE_1_8 (5) |
#define TRX_INIT_FAIL (1) |
trx init function failed (TRX_OFF not reached after reset)
Definition at line 103 of file transceiver.h.
#define TRX_IRQ_AMI_DI | ( | ) | trx_bit_write(SR_MASK_AMI, 0); |
Disable AMI IRQ.
Definition at line 148 of file transceiver.h.
#define TRX_IRQ_AMI_EI | ( | ) | trx_bit_write(SR_MASK_AMI, 1); |
Enable AMI IRQ.
Definition at line 146 of file transceiver.h.
#define TRX_IRQ_BAT_LOW_DI | ( | ) | trx_bit_write(SR_MASK_BAT_LOW, 0); |
Disable BAT_LOW IRQ.
Definition at line 155 of file transceiver.h.
#define TRX_IRQ_BAT_LOW_EI | ( | ) | trx_bit_write(SR_MASK_BAT_LOW, 1); |
Enable BAT_LOW IRQ.
Definition at line 153 of file transceiver.h.
#define TRX_IRQ_CCA_ED_READY_DI | ( | ) | trx_bit_write(SR_MASK_CCA_ED_READY, 0); |
Disable CCA_ED_READY IRQ.
Definition at line 162 of file transceiver.h.
#define TRX_IRQ_CCA_ED_READY_EI | ( | ) | trx_bit_write(SR_MASK_CCA_ED_READY, 1); |
Enable CCA_ED_READY IRQ.
Definition at line 160 of file transceiver.h.
#define TRX_IRQ_PLL_UNLOCK_DI | ( | ) | trx_bit_write(SR_MASK_PLL_UNLOCK, 0); |
Disable PLL_UNLOCK IRQ.
Definition at line 169 of file transceiver.h.
#define TRX_IRQ_PLL_UNLOCK_EI | ( | ) | trx_bit_write(SR_MASK_PLL_UNLOCK, 1); |
Enable PLL_UNLOCK IRQ.
Definition at line 167 of file transceiver.h.
#define TRX_IRQ_RX_START_DI | ( | ) | trx_bit_write(SR_MASK_RX_START, 0); |
Disable RX_START IRQ.
Definition at line 176 of file transceiver.h.
#define TRX_IRQ_RX_START_EI | ( | ) | trx_bit_write(SR_MASK_RX_START, 1); |
Enable RX_START IRQ.
Definition at line 174 of file transceiver.h.
#define TRX_IRQ_TRX_IRQ_END_DI | ( | ) | trx_bit_write(SR_MASK_TRX_IRQ_END, 0); |
Disable TRX_IRQ_END IRQ.
Definition at line 183 of file transceiver.h.
#define TRX_IRQ_TRX_IRQ_END_EI | ( | ) | trx_bit_write(SR_MASK_TRX_IRQ_END, 1); |
Enable TRX_IRQ_END IRQ.
Definition at line 181 of file transceiver.h.
#define TRX_IRQ_TRX_IRQ_START_DI | ( | ) | trx_bit_write(SR_MASK_TRX_IRQ_START, 0); |
Disable TRX_IRQ_START IRQ.
Definition at line 190 of file transceiver.h.
#define TRX_IRQ_TRX_IRQ_START_EI | ( | ) | trx_bit_write(SR_MASK_TRX_IRQ_START, 1); |
Enable TRX_IRQ_START IRQ.
Definition at line 188 of file transceiver.h.
#define TRX_IRQ_UR_DI | ( | ) | trx_bit_write(SR_MASK_UR, 0); |
Disable TX/RX underun IRQ.
Definition at line 197 of file transceiver.h.
#define TRX_IRQ_UR_EI | ( | ) | trx_bit_write(SR_MASK_UR, 1); |
Enable TX/RX underun IRQ.
Definition at line 195 of file transceiver.h.
#define TRX_OK (0) |
trx function succeeded
Definition at line 101 of file transceiver.h.
#define TRX_PLL_FAIL (2) |
trx pll check function failed (PLL_LOCK coult not be observed in PLL_ON)
Definition at line 105 of file transceiver.h.
typedef uint8_t ccamode_t |
typedef bool rxidle_t |
typedef void(* trx_irq_handler_t)(uint8_t cause) |
Data Type for Transceiver IRQ callback function
Definition at line 89 of file transceiver.h.
typedef uint8_t trx_ramaddr_t |
Data Type for Transceiver SRAM address
Definition at line 75 of file transceiver.h.
typedef uint8_t trx_regaddr_t |
Data Type for Transceiver register address
Definition at line 83 of file transceiver.h.
typedef uint8_t trx_regval_t |
Data Type for Transceiver register value
Definition at line 79 of file transceiver.h.
trx_regval_t trx_bit_read | ( | trx_regaddr_t | addr, | |
trx_regval_t | mask, | |||
uint8_t | pos | |||
) |
subregister read
addr | offset of the register | |
mask | bit mask of the subregister | |
pos | bit position of the subregister |
data | pointer where the read and demuxed value is stored |
pos = 4, mask = 0xf0
register value = 0xA5
*data = 0x0A
void trx_bit_write | ( | trx_regaddr_t | addr, | |
trx_regval_t | mask, | |||
uint8_t | pos, | |||
trx_regval_t | value | |||
) |
subregister write
addr | offset of the register | |
mask | bit mask of the subregister | |
pos | bit position of the subregister |
value | data, which is muxed into the register |
pos = 4, mask = 0xf0 register value = 0xA5 (before operation) value = 0x05 register value = 0x55 (after operation)
uint8_t trx_decode_datarate | ( | uint8_t | rhash, | |
char * | rstr, | |||
uint8_t | nlen | |||
) |
Decodes a hash value and returns a datarate string pointer.
rhash | Hash value of a data rate. |
rstr | pointer to the buffer, where data rate is copied, |
nlen | maximum length of rstr |
rhash
is not supported by the transceiver or invalid, otherwise 0. void* trx_decode_datarate_p | ( | uint8_t | rhash | ) |
Decodes a hash value and returns a datarate string pointer in program memory.
rhash | Hash value of a data rate. |
uint8_t trx_frame_get_length | ( | void | ) |
Get length of a received frame.
uint8_t trx_frame_read | ( | uint8_t * | data, | |
uint8_t | datasz, | |||
uint8_t * | lqi | |||
) |
Frame Read.
This function reads a frame from the transceiver.
data | Pointer to an array of (Payload-) bytes that should be sent |
datasz | maximum number of bytes, which fit in the data buffer. |
lqi | Pointer where the LQI value is stored |
uint8_t trx_frame_read_crc | ( | uint8_t * | data, | |
uint8_t | datasz, | |||
bool * | crc_ok | |||
) |
Frame Read with CRC check (and crc value kept).
This function reads a frame from the transceiver. While the upload is in progress, the CRC16 value is caluculated and compared against the last two bytes. The two crc bytes are copied in the data buffer.
data | Pointer to an array of (Payload-) bytes that should be sent |
datasz | maximum number of bytes, which fit in the data buffer. |
crc_ok | Result of the CRC16 check. |
uint8_t trx_frame_read_data_crc | ( | uint8_t * | data, | |
uint8_t | datasz, | |||
uint8_t * | lqi, | |||
bool * | crc_ok | |||
) |
Frame Read with CRC check (and crc value suppressed).
This function reads a frame from the transceiver. While the upload is in progress, the CRC16 value is caluculated and compared against the last two bytes. The two crc bytes are not copied in the data buffer.
data | Pointer to an array of (Payload-) bytes that should be sent |
datasz | maximum number of bytes, which fit in the data buffer. |
lqi | Pointer where the LQI value is stored | |
crc_ok | Result of the CRC16 check. |
void trx_frame_write | ( | uint8_t | length, | |
uint8_t * | data | |||
) |
Frame Write.
This function writes a frame to the transceiver.
length | Length of the frame that should be written into the frame buffer | |
data | Pointer to an array of (Payload-) bytes that should be sent |
uint8_t trx_get_datarate | ( | void | ) |
get current adjusted data rate.
uint8_t trx_get_datarate_str | ( | uint8_t | idx, | |
char * | rstr, | |||
uint8_t | nlen | |||
) |
return a copy of a data rate in a buffer.
idx | Index of the data rate. |
rstr | pointer to the buffer, where data rate is copied, |
nlen | maximum length of rstr |
idx
is out of range, otherwise 0. void* trx_get_datarate_str_p | ( | uint8_t | idx | ) |
return a pointer to a datarate string in the programm memory.
This function can be used to get a list of data rates, supported of the current radio transceiver.
idx | Index of the data rate. |
uint8_t trx_get_number_datarates | ( | void | ) |
return the number of supported data rates.
void trx_io_init | ( | uint8_t | spirate | ) |
SPI Initialization (RADIO_TYPE == AT86RF230).
Init the Serial Peripherial Interface of the AVR
spirate | Configuration Byte of the SPI Control Register (SPCR) |
void trx_parms_get | ( | trx_param_t * | p | ) |
Get static transceiver parameters.
This function reads the static transceiver parameters, defined in a structure and protects it with a CRC16.
p | pointer to the data structure. |
uint8_t trx_parms_set | ( | trx_param_t * | p | ) |
Set static transceiver parameters.
This function writes the static transceiver parameters, defined in a structure protects it with a CRC16.
p | pointer to the data structure. | |
no_crc_check | if this parameter is true, the the CRC given in the sructure is not checked. |
uint8_t trx_reg_read | ( | trx_regaddr_t | addr | ) |
Read Register.
This function reads a transceiver register.
addr | Address of the Register in the Transceiver (Offset) that should be read |
void trx_reg_write | ( | trx_regaddr_t | addr, | |
trx_regval_t | val | |||
) |
Write Register.
This function write to a transceiver register.
addr | Address of the Register in the Transceiver (Offset) that should be written | |
val | Byte that will be written into the Register |
uint8_t trx_set_datarate | ( | uint8_t | rate_type | ) |
set data rate
The transceiver is forced to state TRX_OFF in order to switch the data rate.
rate_type | type code (the data rate hash codes, e.g. OQPSK250, e.g. *PSK macros) of the desired data rate. |
void trx_set_irq_handler | ( | trx_irq_handler_t | irqhandler | ) |
set function pointer for IRQ handler
void trx_sram_read | ( | trx_ramaddr_t | addr, | |
uint8_t | length, | |||
uint8_t * | data | |||
) |
Read SRAM.
addr | Address in the TRX's SRAM where the read burst should start | |
length | Length of the write burst |
data | Pointer to an array of bytes that should be read |
void trx_sram_write | ( | trx_ramaddr_t | addr, | |
uint8_t | length, | |||
uint8_t * | data | |||
) |
Write SRAM.
This function writes into the SRAM of the transceiver.
addr | Address in the TRX's SRAM where the write burst should start | |
length | Length of the write burst | |
data | Pointer to an array of bytes that should be written |