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00054 #ifndef BOARD_IBDT_H
00055 #define BOARD_IBDT_H
00056
00057 #if defined(ibdt212)
00058
00059 #define BOARD_NAME "ibdt212"
00060 #ifndef RADIO_TYPE
00061 #define RADIO_TYPE (RADIO_AT86RF212)
00062 #endif
00063
00064 #elif defined(ibdt231)
00065
00066 #define BOARD_NAME "ibdt231"
00067 #ifndef RADIO_TYPE
00068 #define RADIO_TYPE (RADIO_AT86RF231)
00069 #endif
00070
00071 #else
00072 #error "Unsupported BOARD_TYPE"
00073 #endif
00074
00075
00076
00077
00078
00079
00080
00081
00082
00083
00084 #ifndef DEFAULT_SPI_RATE
00085 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00086 #endif
00087
00088
00089
00090 #define DDR_TRX_RESET DDRD
00091 #define PORT_TRX_RESET PORTD
00092 #define MASK_TRX_RESET (_BV(PD6))
00093
00094
00095
00096 #define PORT_TRX_SLPTR PORTD
00097 #define DDR_TRX_SLPTR DDRD
00098 #define MASK_TRX_SLPTR (_BV(PD7))
00099
00100
00101
00102
00103 # define TRX_IRQ _BV(INT2)
00104 # define TRX_IRQ_vect INT2_vect
00107 # define TRX_IRQ_INIT() do{\
00108 EICRA = _BV(ISC20) | _BV(ISC21);\
00109 EIMSK |= (TRX_IRQ);\
00110 } while(0)
00113 #define DI_TRX_IRQ() {EIMSK &= (~(TRX_IRQ));}
00114
00115 #define EI_TRX_IRQ() {EIMSK |= (TRX_IRQ);}
00116
00118 #define TRX_TSTAMP_REG TCNT1
00119
00120
00121 #define SPI_TYPE SPI_TYPE_SPI
00122 #define DDR_SPI (DDRB)
00123 #define PORT_SPI (PORTB)
00125 #define SPI_MOSI _BV(PB5)
00126 #define SPI_MISO _BV(PB6)
00127 #define SPI_SCK _BV(PB7)
00128 #define SPI_SS _BV(PB4)
00130 #define SPI_DATA_REG SPDR
00136 static inline void SPI_INIT(uint8_t spirate)
00137 {
00138
00139 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00140 DDR_SPI &= ~SPI_MISO;
00141 PORT_SPI |= SPI_SCK | SPI_SS;
00142
00143 SPCR = (_BV(SPE) | _BV(MSTR));
00144
00145 SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00146 SPSR &= ~_BV(SPI2X);
00147
00148 SPCR |= (spirate & 0x03);
00149 SPSR |= ((spirate >> 2) & 0x01);
00150
00151 }
00152
00154 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00155
00156 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00157
00158 #define SPI_WAITFOR() do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00159
00160
00161 #define LED_PORT PORTD
00162 #define LED_DDR DDRD
00163 #define LED_MASK (0x30)
00164 #define LED_SHIFT (4)
00165 #define LEDS_INVERSE (1)
00167 #define LED_NUMBER (2)
00170
00171
00172 #define PORT_KEY PORTD
00173 #define PIN_KEY PIND
00174 #define DDR_KEY DDRD
00175 #define MASK_KEY (0x0C)
00176 #define SHIFT_KEY (2)
00177 #define INVERSE_KEYS (1)
00179 #define PULLUP_KEYS (1)
00180
00181 #define SLEEP_ON_KEY_INIT() \
00182 do{\
00183 PCMSK0 |= _BV(PCINT2);\
00184 }while(0)
00185
00186 #define SLEEP_ON_KEY() \
00187 do{\
00188 EIMSK |= _BV(PCIE0);\
00189 set_sleep_mode(SLEEP_MODE_PWR_DOWN);\
00190 sleep_mode();\
00191 EIMSK &= ~_BV(PCIE0);\
00192 } while(0)
00193
00194 #define SLEEP_ON_KEY_vect PCINT0_vect
00195
00196
00197
00199 #define HIF_TYPE HIF_UART_0
00200
00201
00202
00203 #define HWTMR_PRESCALE (64)
00204 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00207 #define HWTIMER_TICK_NB (0.001/HWTIMER_TICK)
00209 #define HWTIMER_REG (TCNT1)
00211 #define TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB)
00212
00215 #define TIMER_POOL_SIZE (8)
00218 #define TIMER_INIT() \
00219 do{\
00220 TCCR0B = _BV(CS01) | _BV(CS00);\
00221 TCCR0B |= _BV(WGM02); \
00222 OCR0A = HWTIMER_TICK_NB; \
00223 TIMSK0 |= _BV(OCIE0A);\
00224 }while(0)
00225
00227 #define TIMER_IRQ_vect TIMER0_COMPA_vect
00228
00229 #endif