board_cbb2xx.h

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00001 /* Copyright (c) 2011 Axel Wachtler, Daniel Thiele
00002    All rights reserved.
00003 
00004    Redistribution and use in source and binary forms, with or without
00005    modification, are permitted provided that the following conditions
00006    are met:
00007 
00008    * Redistributions of source code must retain the above copyright
00009      notice, this list of conditions and the following disclaimer.
00010    * Redistributions in binary form must reproduce the above copyright
00011      notice, this list of conditions and the following disclaimer in the
00012      documentation and/or other materials provided with the distribution.
00013    * Neither the name of the authors nor the names of its contributors
00014      may be used to endorse or promote products derived from this software
00015      without specific prior written permission.
00016 
00017    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00018    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00021    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00022    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00023    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00025    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00026    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00027    POSSIBILITY OF SUCH DAMAGE. */
00028 
00029 /* $Id$ */
00058 #ifndef BOARD_CBB2XX_H
00059 #define BOARD_CBB2XX_H
00060 
00061 #if defined(cbb230)
00062 # define BOARD_TYPE BOARD_CBB230
00063 # define BOARD_NAME "cbb230"
00064 # define RADIO_TYPE (RADIO_AT86RF230A)
00065 #elif defined(cbb230b)
00066 # define BOARD_TYPE BOARD_CBB230B
00067 # define BOARD_NAME "cbb230b"
00068 # define RADIO_TYPE (RADIO_AT86RF230B)
00069 #elif defined(cbb231)
00070 # define BOARD_TYPE BOARD_CBB231
00071 # define BOARD_NAME "cbb231"
00072 # define RADIO_TYPE (RADIO_AT86RF231)
00073 #elif defined(cbb212)
00074 # define BOARD_TYPE BOARD_CBB212
00075 # define BOARD_NAME "cbb212"
00076 # define RADIO_TYPE (RADIO_AT86RF212)
00077 #elif defined(cbb232)
00078 # define BOARD_TYPE BOARD_CBB232
00079 # define BOARD_NAME "cbb232"
00080 # define RADIO_TYPE (RADIO_AT86RF232)
00081 #endif
00082 
00083 #ifndef DEFAULT_SPI_RATE
00084 # define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
00085 #endif
00086 
00087 /*=== Hardware Components ============================================*/
00088 
00089 /*=== TRX pin access macros ==========================================*/
00090 
00091 #define PORT_TRX_RESET  PORTC         
00092 #define MASK_TRX_RESET  (_BV(0))      
00094 #define TRX_RESET_INIT() PORT_TRX_RESET.DIRSET = MASK_TRX_RESET    
00095 #define TRX_RESET_HIGH() PORT_TRX_RESET.OUTSET = MASK_TRX_RESET   
00096 #define TRX_RESET_LOW()  PORT_TRX_RESET.OUTCLR = MASK_TRX_RESET  
00098 #define PORT_TRX_SLPTR  PORTC         
00099 #define MASK_TRX_SLPTR  (_BV(3))    
00102 #define TRX_SLPTR_INIT() PORT_TRX_SLPTR.DIRSET = MASK_TRX_SLPTR
00103 
00104 #define TRX_SLPTR_HIGH() PORT_TRX_SLPTR.OUTSET = MASK_TRX_SLPTR
00105 
00106 #define TRX_SLPTR_LOW()  PORT_TRX_SLPTR.OUTCLR = MASK_TRX_SLPTR
00107 
00108 
00109 /*=== IRQ access macros ==============================================*/
00110 # define TRX_IRQ_vect    PORTC_INT0_vect    
00111 # define TRX_IRQ         _BV(2)    
00117 # define TRX_IRQ_INIT()  do{\
00118                             PORTC.INT0MASK = TRX_IRQ; \
00119                             PORTC.INTCTRL = PORT_INT0LVL_HI_gc; \
00120                             PMIC.CTRL |= PMIC_HILVLEN_bm;\
00121                           } while(0)
00122 
00124 #define DI_TRX_IRQ() {PORTC.INT0MASK &= ~TRX_IRQ;}
00125 
00127 #define EI_TRX_IRQ() {PORTC.INT0MASK |= TRX_IRQ;}
00128 
00133 #define TRX_TSTAMP_REG TCD0.CNT
00134 
00135 /*=== SPI access macros ==============================================*/
00136 #define PORT_SPI (PORTC)  
00138 #define SPI_MOSI _BV(5)  
00139 #define SPI_MISO _BV(6)  
00140 #define SPI_SCK  _BV(7)  
00141 #define SPI_SS   _BV(4)  
00143 #define SPI_DATA_REG SPIC.DATA  
00149 static inline void SPI_INIT(uint8_t spirate)
00150 {
00151     /* first configure SPI Port, then SPCR */
00152     PORT_SPI.OUTSET = SPI_SCK | SPI_SS;
00153     PORT_SPI.DIRSET = SPI_MOSI | SPI_SCK | SPI_SS;
00154     PORT_SPI.DIRCLR = SPI_MISO;
00155 
00156     SPIC.CTRL = SPI_ENABLE_bm | SPI_MASTER_bm;
00157 
00158     SPIC.CTRL |= (spirate & 0x03);
00159     SPIC.CTRL |= ((spirate << 5) & 0x80); /* CLK2X */
00160 }
00161 
00163 #define SPI_SELN_LOW()       uint8_t sreg = SREG; cli(); PORT_SPI.OUTCLR = SPI_SS
00164 
00165 #define SPI_SELN_HIGH()      PORT_SPI.OUTSET = SPI_SS; SREG = sreg
00166 
00167 #define SPI_WAITFOR()        do { while((SPIC.STATUS & SPI_IF_bm) == 0);} while(0)
00168 
00169 
00170 /*=== LED access macros ==============================================*/
00171 #define LED_PORT     PORTB_OUT
00172 #define LED_DDR      PORTB_DIR
00173 #define LED_MASK     (0x07)
00174 #define LED_SHIFT    (0)
00175 #define LEDS_INVERSE (0)
00176 #define LED_NUMBER   (3)
00177 
00178 /*=== KEY access macros ==============================================*/
00179 #define PORT_KEY     PORTB_OUT
00180 #define PIN_KEY      PORTB_IN
00181 #define DDR_KEY      PORTB_DIR
00182 #define MASK_KEY     (0x08)
00183 #define SHIFT_KEY    (3)
00184 #define INVERSE_KEYS (1)
00185 
00186 #define KEY_INIT() do{ PORTB_PIN3CTRL = PORT_OPC_PULLUP_gc; DDR_KEY &= ~MASK_KEY; }while(0)
00187 
00188 #define SLEEP_ON_KEY_INIT() do{}while(0)
00189 #define SLEEP_ON_KEY() \
00190         do{\
00191         } while(0)
00192 
00193 #define SLEEP_ON_KEY_vect PORTB_INT0_vect
00194 
00195 /*=== Host Interface ================================================*/
00196 #define HIF_TYPE (HIF_UART_0)
00197 
00198 /*=== TIMER Interface ===============================================*/
00199 #define HWTMR_PRESCALE  (1)
00200 #define HWTIMER_TICK    ((1.0*HWTMR_PRESCALE)/F_CPU)
00201 #define HWTIMER_TICK_NB (0xFFFFUL)
00202 #define HWTIMER_REG     (TCD0.CNT)
00203 #define TIMER_TICK      (HWTIMER_TICK_NB * HWTIMER_TICK)
00204 #define TIMER_POOL_SIZE (4)
00205 #define TIMER_INIT() \
00206     do{ \
00207         TCD0.CTRLA = TC_CLKSEL_DIV1_gc; \
00208         TCD0.INTCTRLA = TC_OVFINTLVL_OFF_gc; \
00209     }while(0)
00210 #define TIMER_IRQ_vect   TCD0_OVF_vect
00211 
00212 #endif /* BOARD_CBB2XX_H */

This documentation for µracoli was generated on Wed Mar 14 2012 by  doxygen 1.7.1